Begining in 1998, workshops dedicated to a special field were incorporated to the programme of the MIDEM Conferences. During the workshop, five to seven invited speakers present papers on the chosen topics from different aspects within their special field, thus offering the audience valuable information. Time for thorough discussions is provided between invited presentations. Conference attendees are encouraged to present their research results in the Conference session dealing with the dedicated topic. Attendance at the workshop is included in the Conference registration fee.

For the year 2002, we are pleased to announce a

Two recent reports (W. Custer and R. Tummala) suggest that the global electronics industry was worth about 1.2×10¹² USD in the year 2000, and that the world electronics market is expected to double in size within a decade, making it the biggest single market in the world economy. More than 70% of this market belongs to hardware; and the semiconductor market accounts for approximately 23% of hardware. The largest and the most important part of the hardware market is related to the processing of information (electronic signal), which is responsible for approximately 35% of hardware. The total information- processing market includes the packaging (interconnection and assembling) market, which makes up about 44% of this segment. Therefore it can be concluded that packaging, interconnection, and assembling are important technologies in the electronic industry. The general technology trends in this segment are towards miniaturisation, cost reduction, microsystems, integration, higher reliability, application on the technology borders, ecological friendly materials and processes, etc. There are also tendencies towards fast prototyping, new education programs, trans-institution co-operation etc. Most of these aspects will be presented and discussed on the workshop.

The workshop is co-organized by Jožef Stefan Institute.

The programme committee is pleased to announce the following invited speakers, who will give their presentations on the following subjects :

Janusz Ptak,
Hybrid Microelectronics Specialist, Angerville, France

Business and Technology Chalanges in Electronics Industry in the Early 21^st Century

The end of the 20th century has been characterized by a rapid technological evolution and very promising consumption behaviour. The growth for the coming years seemed to be granted due to the spectacular development of communications and information technologies.

Unfortunately the "wake-up" in 2001 was very cruel. Almost all electronics sectors have been severely affected by the implosion of communications market and consequently the biggest downturn in the history of electronics industry. During these tough times, the challenges faced in electronic and microelectronic sectors became even more crucial than before.

The progress will certainly continue in the future but the economy is much more difficult and in these conditions only the most dynamic, the most flexible or the most diversified companies able to continue to develop new technologies and to serve different markets will survive.

Despite this recent recession, the coming years will be the years of extraordinary development of personal, data and wireless communications requiring hand-held, nomadic products and asking for more complex and intelligent integrated circuits. It will require a very strong miniaturisation, an increase of working frequency and a significant cost reduction. High performance, high volume, low cost and a very short time-to-market are the main drivers.

In the presentation we will try to find out what are the business, technology and economic challenges in face of electronics companies, considering trends in a few major areas: technology, processing, packaging, design & production process, technical knowledge, company strategy and industry structure.

The evolution in major market segments (communications, automotive, industrial, home entertainment) and in microelectronics technology (RF, electro-optical components, MEMS) will be described and illustrated by a number of figures and diagrams and challenges related to technical performances, quality, cost, mass production and time-to-market, faced by electronics companies, will be highlighted.

Paul Svasta, Virgil Golumbeanu, Ciprian Ionescu,
Department of Electronic Technology and Reliability, Center for Technological Electronics and Interconnection Techniques, Politehnica University of Bucharest, Romania

Electronic Passive Components Training Activity -
Demand for Performance Electronic Package Development

Beside the active electronic components the passive ones are subject to continuing developments. It is difficult to imagine the dynamics of electronic products without the proper "support" of passives. In a way it is possible to say: "Today the passives are very active!". More and more requirements are coming from end users, the equipment developers. In the same time new electronic packaging technology ask for new feature of components. These features must be seen in a large approach that includes electrical, mechanical, thermal, technological, and other points of view. This huge amount of knowledge must be appropriate for the packaging engineers. It is expected that in the near future the demand of such specialists will dramatically increase.

Today's exciting new products - including cell phones, laptop computers and personal data assistance - will change the way we live. These products are known for their portability, ease of use, small size and continuing increased performance. Every one of such products uses passive components in one form or another. In fact it is difficult to nominate an electronic product without electronic passive components insides. With many different capabilities and unique performance characteristics available, design engineers can use passive components to address their design challenges like: power handling, ultra high stability, current sensing, low thermal deviation, pulse handling, influence of frequency, etc. By matching the right passive component technology to the design requirements, during the development, the engineer can optimise the overall product.

The paper will be analysing some aspects of electronic packaging education focused on the most usual electronic passive components. The influence of parasitics to impedance of passive components at high frequency will be highlighted One of the main problems for engineer takes into account the proper behaviour of the passive components included in the electronic circuits. The impedance of passive components will be analysed according to technology, material, structure and geometry. The computed results will be compared to the experimental ones.

Jutta Mueller, Hansjoerg Griese, Herbert Reichl*, K.-H. Zuber*,
Fraunhofer Institut für Zuverlässigkeit und Mikrointegration, Berlin, Germany
*Technical University of Berlin, Berlin, Germany

Lead-free Interconnection Technology and the Environment

Trends of growing consumption, decreasing product lifetime and new application fields in nearly all industry segments lead to an enormous increase of electronics products. The production, use as well as the end of life treatment of these products cause considerable environmental impacts. To prevent damages to human health and the environment, an economic growth in a sense of sustainable development has to be realised and new products and process technologies should prove that they contribute to the solution of global environmental issues.

In the presentation the interconnection systems including technologies, printed circuit board and component finishes as well as solders in PCB assembly will be discussed in correlation to their environmental behaviour. At the present time a ban of the toxic element lead for the interconnection systems is planned in the EU and a change to lead-free soldering takes already place. However, the new technologies should not induce new environmental borders. Therefore an ecological assessment was carried out in regards to the whole life cycle. That means that all life phases of the solder as well as of the surface finishes are taken into consideration. From an environmental point of view the energy demand is critical in most of the lead free soldering processes. This has to be minimised. Furthermore surface finishes with nickel should be avoided.

Paul Collander,
Nokia Networks, Espoo, Finland

Packaging and Interconnect for RF and Microwave

The presentation will review different packaging and interconnect issues in the telecom market where RF properties dominate. A short review of single chip packages for different frequency ranges will be followed by a deeper view into multichip modules of different constructions. Last the growing importance of passives and the opportunities to integrate them will be discussed. The view is from a system house that needs to source or subcontract all components and most assemblies.

For RF chips, the electrical performance is dominating construction and assessment work. The aim is to avoid loosing signal strength, avoid electromagnetic interference and still keep the chip cool enough during all use circumstances.

For Micro- and Millimeter- wave chips many semiconductor manufacturers are only now starting to consider delivery in single chip packages and performance is generally specified on chip level. Reduced bond wire length packages are now developed.

Multichip Modules have continuously had a stronghold in RF and High-speed packaging but with the fast growing volumes of RF for Telecom the price pressure is multiplied and very different solutions are needed. Work is ongoing simultaneously on substrate technologies, chip attaches and wiring, reliability without hermeticity and last but not least MCM to board second level interconnect reliability and performance.

With the higher integration rate on chips follows a larger number of accompanying passives. In RF and analog functions passives dominate. In spite of low cost of passive components their logistics and assembly add to manufacturing cost. As most solder joints in a traditional assembly are for passives their theoretical impact on reliability is big. Both high-speed performance and substrate space can be greatly improved with integrated passives. LTCC has been analysed as a solution for RF MCM-C with integrated passives.

Leszek J. Golonka, Andrzej Dziedzic, Jaroslav Kita, Tomasz Zawada,
Wroclaw University of Technology, Faculty of Microsystem Electronics and Photonics, Wroclaw, Poland

LTCC in Microsystems Applications

Low Temperature Cofired Ceramic Technology (LTCC) is known for many years. Multilayer LTCC modules with conduction lines were made at the beginning. Passive integrated elements (MCIC) were added after some years. Recently, the LTCC structure consists of conduction lines, passive elements and microsystems (sensors, cavities, and actuators). Moreover, MEMS package is made very often from LTCC ceramics.

The general information on the technology as well as LTCC microsystems design and properties will be presented. Moreover, the detailed information on microsystems made at Wroclaw University of Technology will be given.

Marko Hrovat, Darko Belavic*, Marko Pavlin*, Janez Holc,
Jožef Stefan Institute, Ljubljana, Slovenia
* HIPOT-R&D, Sentjernej, Slovenia

Diffusion-patterning: One of the Thick-film Interconnections Technologies

Diffusion patterning is a dielectric patterning technology, which is used in the screen-printed thick film technology for higher density multilayer circuits. This technology is suitable for producing lower cost multichip modules and requires a low additional investment in conventional thick-film technology production lines. Comparisons of via resolution capability of diffusion patterning versus conventional thick film technology are described and discussed. Preliminary experimental results obtained with a test circuit showed that 200 mm lines and 200 mm vias could be achieved with acceptable yield and with minimal modification to standard production lines. The electronic circuit for the pressure sensor was designed and realised with the verified technology as a low-cost ceramic multichip module. A few results of an investigation of some thick film materials, which comprise the "set" of pastes for diffusion patterning technology, are presented. Based on the obtained results the design rules have been determined. The electronic circuit for the pressure sensor was designed with the advantages of semi-custom ASIC for signal processing and realised with verified technology as a low-cost ceramic multichip module.

Horatio Quinones,
Asymtek Headquarters, Carlsbad, CA, USA

Speaker will present a short overview with fundamentals on electronic packages, and his latest work in the area of material dispensing including jetting technologies for advanced packages.

S. Valizadeh, L. Hultman*,
ACREO AB, Norrköping, Sweden
*Thin Film Physics Division, Department of Physics, Linköping University, Linköping, Sweden

Template Synthesis of One Dimensional Single and Multilayered Nanowires

Electrochemically synthesized of magnetic nanostructures, namely arrays of magnetic nanowires Co and of Ag/Co and Au/C multilayered nanodes, were developed into nanometer-wide cylindrical nano-sized pores of nuclear track-etched porous membranes.
The methods developed are based on pulse plating in which two metals are deposited from a single solution bath using potentiostatic control. Here, the nobler element is kept at much lower concentration than the less noble element so that the rate of reduction of the nobler element becomes diffusion limited by switching between the deposition potentials of the two constituents. The electrodeposition process is controlled by a computer, which continuously integrates the charge during each layer deposition. The potential is switched when the deposition charges for the nonmagnetic and the magnetic layers reach the set value. Such a procedure is required to give uniform layer thickness all along the filament. Our method enables us to synthesize arrays of electrodeposited multilayered nanowires in a porous track-etched polycarbonate membrane with the control of several parameters over wide ranges. Electrochemical deposition of 8 nm Ag/15 nm Co as well as 4 nm Au/12 nm Co multilayers, based on the new technique called nanomaterial membrane-based synthesis has been performed.
The morphology of the individual wires collected after dissolution of the membrane have been investigated by transmission electron microscopy, x-ray diffraction, scanning electron microscopy, atomic force microscopy and energy-dispersive x-ray spectroscopy. Magnetic measurements with the external field parallel and perpendicular to multilayered nanowire arrays have been investigated. In the case of Co nanowires, the difference of saturation fields between the parallel and perpendicular orientation fields corresponds well to the expected demagnetisation field value due to the shape anisotropy in case of an infinite thin Co cylinder. The evidence of magnetic anisotropy was observed on Au/Co multilayered nanowires.

Contact person for the Workshop on
PACKAGING AND INTERCONNECTIONS IN ELECTRONICS
Darko Belavic, workshop chairperson
c/o Jozef Stefan Institute Ljubljana
Jamova 39
1000 Ljubljana, Slovenia
tel. +386 1 4773479, fax. +386 1 4263126
email: darko.belavic@ijs.si